Type: Journal Publication
Author(s): Hanchao Li, Hanlin Xie, Qingyun Xie, Siyu Liu, Yue Wang, Yuxuan Wang, Kumud Ranjan, Yihao Zhuang, Xiao Gong, Geok Ing Ng
DOI: 10.1063/5.0219359
Published In: Applied Physics Letters, Vol. 125, 023504 (2024) – Editor’s Pick

Abstract:

Recent GaN semiconductor research has identified that parasitic channel leakage remains a significant hurdle for device efficiency. This study, featured as an Editor’s Pick in Applied Physics Letters, investigates these leakage characteristics in AlN/GaN/AlGaN HEMTs on silicon. The investigation specifically examines how mesa isolation depths influence overall electrical performance.

The research identifies an N-type parasitic channel within the unintentionally doped AlGaN back-barrier. This channel contributes to a buffer leakage of 12.8 mA/mm. Notably, significant differences in off-state leakage were observed between mesa depths, reaching up to three orders of magnitude. Temperature-dependent measurements confirm that the primary leakage mechanism is two-dimensional variable range hopping (2D-VRH) along the device sidewalls.

Increasing the isolation distance from 3 to 5 μm significantly improved resistance. These findings provide critical insights into carrier transport for the semiconductor industry in Singapore. By understanding the 2D-VRH mechanism, developers can refine surface passivation and etching strategies. This work provides a vital roadmap for improving the reliability of high-frequency power electronics.

In conclusion, this GaN semiconductor research offers a framework for improving power electronics reliability. This work aligns with the innovation mission of NSTIC (GaN) and our commercial foundry services.

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