Trapping Effect in AlN/GaN/AlGaN High-Electron-Mobility Transistors Revealed by Tristate Pulse IV Technique
May 21 2025
Type: Journal Publication
Author(s): Yihao Zhuang, Kumud Ranjan, Qingyun Xie, Hanlin Xie, Hanchao Li, Yue Wang, Siyu Liu, Geok Ing Ng
DOI: 10.1002/pssa.202500034
Published In: physica status solidi (a), vol. 222, no. 3, pp. 2500034 (2025)
Abstract:
In the field of semiconductor fabrication, temporal trap dynamics are as vital as epitaxial growth. This study differentiates itself by using a specialised tristate pulse IV technique. This method uncovers the transient behaviour of AlN/GaN/AlGaN high-electron-mobility transistors (HEMTs). Unlike standard DC tests, this approach offers a high-resolution look at charge capture. It allows for a clear separation of gate-lag and drain-lag effects in real-time.
The research examines charge mechanisms within the buffer and barrier regions. These factors directly impact overall device stability. The findings, published in physica status solidi (a), show how advanced characterisation refines our knowledge. Specifically, the study clarifies carrier transport in GaN-on-Si HEMT structures under varying bias.
In conclusion, the work by Y. Zhuang et al. adds a vital tool to the semiconductor fabrication toolkit. The research moves beyond simple “pass/fail” trapping tests. Instead, it provides a dynamic tristate analysis. This supports the development of robust GaN-on-Si platforms for 5G and power modules. This work aligns with the innovation mission of NSTIC (GaN) and our commercial foundry services in Singapore.
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